K & F Computing Research Co.

PGPG2 (Pipeline Generator for Programmable GRAPE, generation 2¹) is a pipeline-designing utility, with which users can describe arithmetic computations using a high-level language similar to C. The utility converts the description into a pipeline logic for GRAPE-7 and a user library to handle it.

Key Features

Converts a pipeline design described in a high-level language into a hardware logic described in VHDL. Typically, a 10 to 100 lines of description in the high-level language is converted into a 1,000 to 10,000 lines of description in VHDL.
A pipeline logic generated by the utility is combined with an interface logic² (a logic to control data transfer between GRAPE-7 and the host), so that it can be synthesized using Altera's QuartusII Web Edition³ (charge free). FPGA devices on a GRAPE-7 are configured with the synthesized logic.
A schematic of the logic, a bit-level emulator, a logic for simulation and its test vectors are also generated. With these tools and data, a user can check correctness of the logic and can evaluate accuracy of pipeline output.
A user library and its header file to handle the pipeline from the host computer are also generated.

Softwares, Data, and Documents

Related softwares, data, and documents are bundled in an all-in-one package, which includes:

Usage Examples

To modify existing pipelines:

A user can modify number format and bit width of an existing pipeline, such as the pipeline for gravitational-force calculation equivalent to GRAPE-5, so that it suits the user's own application. In a case accuracy required for the application is lower than that offered by the existing pipeline, the pipeline can be redesigned with fewer hardware resources. Such a modification may cause increase of the number of pipelines integrated into the FPGA devices.

To design totally new pipelines:

A user can design totally new pipelines for his/her own purpose. Previous works in several fields of computational science are showing that, in some case, hardwired pipeline can accelerate calculation speed of molecular dynamics (MD), smoothed particle hydrodynamics (SPH), and boundary integral equation method (BIEM).

Related Information

GRAPE-7: an FPGA-based acceleration board for many-body simulations

1: PGPG2 is a utility designed and developed by K & F Computing Research Co. based on PGPG (Hamada et al., 2005). There exists another extension of PGPG, named PGR (Hamada & Nakasato, 2005). The concept of "pipeline description by a high-level language" is proposed by Dr. Nakasato (Aizu University) in 2006.

2: A proper interface logic is automatically generated, according to the model of GRAPE-7 in target.

3: [For GRAPE-7 Model800/100 users]: In order to generate a bit-stream data (the final product of a pipeline design to be written to FPGA devices), PLDA's PCI-X IP core is required. For GRAPE-7 users who do not have the core, we offer a free-of-charge service to generate the bit-stream data. [For GRAPE-7 Model600/300 users]: The core is not necessary for Model600 and Model300. A user can generate the bit-stream data in his/her own environment.

Contact: info@kfcr.jp